Remote BIOS manager
(Z8Encore! contest entry: Z4246)
Introduction
Construction described below is a variant of “KVM (keyboard-video-mouse)”-over-IP device primarily intended for home or small office use.
Today’s “KVM-over-IP” switches are very complex allowing users to manage large data centers. But here is still a gap in hardware remote management devices in the SOHO sector of market.
Abbreviations and terms
|
Abbreviation |
Full term |
Description |
|
PAL |
Phase Alternate Line |
European television broadcasting standard |
|
NTSC |
National Television Standards Committee |
USA & Japan TV broadcasting standard |
|
KVM |
Keyboard-video-mouse |
Local PC console |
|
IP |
Internet Protocol |
|
|
|
Frame |
One TV frame consist of two fields (even and odd) |
|
|
Field |
Half of frame |
Purpose
Nowadays notebooks are everywhere. Cheap and thus more available and more powerful. I personally switched from desktop PC to laptop completely. I have a really nice workplace on my desktop now as I sold-out old big 17” CRT. But time-to-time friend of mine came to visit me with a big case under his arms asking: Please update my antiviral software or do some maintenance with my desktop PC. Hard task without VGA monitor.
But these lucky days there are TV-output equipped VGA cards available in 50+% of modern PCs. All I have to do is shut-down my favorite music station and switch TV for AV-input. Now I’m able to do all required task.
(In fact I store one PCI and one AGP with TV-out in my drawer. Just for a case, when brought-in PC doesn’t have TV-Out).
But I really love to listen to music during my PC sessions. So I started to search how to send video output of friend’s PC to my notebook or do a complete control (with keyboard and mouse emulation) of this PC from my laptop console.
External USB TV tuner was the first choice. However, USB1.1 speed is limiting and TV tuner has input RF block which I have never planed to use.
After that I was still missing console emulation (keyboard and mouse). This will be my turn after all - to develop proper console emulation device. And at last, price/performance ratio of USB TV-tuners is not quite reasonable.
Which interface on today’s laptop is faster then USB (1.1) and more suitable for remote control interface? Of course, it’s Ethernet.
Commercially available remote Ethernet consoles (known as “KVM over IP” solutions) are quite complex and practically unavailable for small and home-office users due to their cost. (On the other hand their real benefit is true VGA input, not CVBS signal input as in this project).
Because of this I have decided to develop my own device which will completely handle remote PC management over Ethernet. (Device is still under development. Now it lack only mouse support, other features are fully functional)
Technical background
There are many software-based systems for remote PC management available on the market today. Table 1 shows some of technologies and products for two major PC platforms.
|
Linux/Unix |
Windows (NT/2000/XP) |
||
|
RS-232 (text-only) |
|||
|
Boot-loader support (LILO,grub) |
serial console (boot) |
||
|
OS support (gettyps) |
|
||
|
Ethernet |
|||
|
Textual |
Graphical |
Textual |
Graphical |
|
telnet |
VNC |
telnet w/NTLM |
RDP
|
|
Secure shell (SSH) |
remote X-Window session |
3rd party (WinSSHd) |
(Remote Desktop /Remote Assistance) |
|
|
|
|
3rd party (PCAnywhere etc.) |
Table 1
Common rules which applies to remote PC management:
· Lower level of access represents earlier access to PC console (screen, keyboard, mouse). Levels order from lower to higher: POST, BIOS, boot, operating system, service, application
· Lower access usually decreases allowable physical distance from managed PC (VGA cables (5-15m), serial ports (30-100m))
· Establishing more remote access management points requires counterparts in more managing applications
· Usage of more physical media has advantage in backup remote management path, but disadvantages is that it requires more cables
Most featured remote PC management way is to access PC console by separate device.
This system is used by industrially available KVM switches. This approach requires separate Ethernet (or at least CAT5) access to both – managed PC and remote management device. Big advantage in this configuration is ability to access managed PC in case of disk failures.
“KVM over IP” technique requires these components of PC to be functional:
· Mainboard
· CPU
· VGA
· Power supply
Other components may be broken, but remote access is still possible.
As we can see, this approach doesn’t require any disk subsystem to be running (doesn’t require running operating system or boot loader).
Design
Current device design is driven by conditions mentioned above. Remote BIOS manager is able to remotely manage standard PC with PS/2 keyboard (and mouse) connectors.
Inputs:
· Analog CVBS from TV-out connector of VGA card
· PS/2 input from local console keyboard
· PS/2 input from local console mouse (not implemented yet)
Outputs:
· mixed PS/2 output to PS/2 keyboard connector of managed PC
· mixed PS/2 mouse output to PS/2 mouse connector of managed PC (not implemented yet)
Bi-directional:
· Ethernet – input: keystrokes (and mouse movements - NA) from operator console
· Ethernet – output: digitized CVBS signal from managed PC
CVB signal parameters which is eligible on Remote BIOS manager video input are shown in Table 2.
|
Parameter |
PAL |
NTSC |
|
Horizontal sync freq |
15.635 Hz |
15.374 Hz |
|
Vertical sync freq |
50 Hz |
60 Hz |
|
Number of lines |
625 |
525 |
|
Order of frames |
Interlaced |
Interlaced |
|
Color sub-carrier |
4.433619 MHz |
3.579545 MHz |
|
Output coupling (impedance) |
75 Ω |
75 Ω |
Table 2
Hardware
Remote BIOS manager Hardware is quite complex due to rather complicated input part. We should give that part a real name. Let it be frame grabber or picture digitizer, if you wish.
On the other hand design is flexible enough, because the whole device consists of three separate modules, which can be easily updated or completely replaced by newer (smarter or much featured) versions.
Current modules configuration follows:
· Main module (MM) consist of MCU, SRAM IC, SRAM address generators, SRAM signals mux, data bus driver, picture synchronized SRAM signals generation for frame capture
· ADC conversion module (ADCM) - analog signal processing, , A/D converter, optional CVBS signal color decoding
· Ethernet module (EM) – embedded Ethernet module with NE2000 compatible chip (former plan was to use Crystal CS8900 chip, but it was impossible to obtain correct Ethernet transformer - with 1:1.41 ratio - near by me)
Complete block diagram of Remote BIOS manager is shown in Figure 1. Grayed parts are separate modules. White blocks are members of main module.
Complete schematic diagram is split into few diagrams (Figure 2 - Figure 7). Module names to IC binding shows following table. It briefly describes each part of schematic too. Blocks are ordered from upper left to down right corner.
|
Block Module |
Schematic |
Function |
|
Main Module (MM) - Main Module (MM) - Figure 2 |
||
|
Console/Remote KB switch |
IC19 |
Switch between local or remote Ethernet keyboard device |
|
Quasi-PLL clock generation |
IC2, IC3 |
Clock generator generates clock pulses for memory write operations during picture grabbing. It is synchronized to input CVBS signal |
|
Sync separation |
IC9 |
Drives timing for analog signal processing and A/D conversion |
|
Start/Stop signal generation |
IC8 |
When this circuit is reset by MCU, it clears its outputs and waits for following rising edge on pin7 IC9 (start of odd field). Edge is copied to the output and Start signal is set (pin5 IC8A). Following field sets the Stop signal similarly. |
|
SRAM signal generation |
IC4, IC7B, IC6A |
SRAM control signal generation circuit. It increments memory address and generates write pulses |
|
Write delay circuit |
C18, R5 |
Not a real delay, but only phase shift to achieve required timing for memory signals (/CS, /WR) |
|
Memory signal MUX |
IC14A |
Decides whether memory signals are driven by SRAM signal generation part or MCU |
|
Address generation |
IC10, IC11 |
Two cascade ripple counters used to generate 19-bit address for address bus of 4Mbit SRAM |
|
MCU |
IC1 (U1) |
The core which manages all the data traffic, drives bus arbiter, Ethernet controller and implements TCP/IP stack |
|
Bus driver |
IC5 |
Data bus direction and 3V3 to 5V logic level converter. External data bus can be easily completely isolated from Z8 |
|
SRAM (4Mbit, 55ns) |
IC12 |
Stores digitized picture data converted from CVBS by ADCM |
|
External modules |
||
|
AD Conversion module |
|
Converts CVBS signal from analog to digital presentation |
|
ADCM add-on |
|
PAL (NTSC) to RGB decoder is an optional part |
|
Ethernet communication module |
Figure 3, IC2, IC2 |
Enables communication over Ethernet. Module is connected to Z8 with minimal ISA (like) bus. |
ADCM is responsible for analog to digital signal conversion. Digital information should be prepared correctly for further operation - memory write. ADCM can be configured in one of these available options:
1. Discrete monochrome signal processing – use quad-comparator IC to convert 7CVBS signal to 4 digital I/O lines. In this configuration we only have 5 values to represent pixel brightness value (0000b, 0001b, 0011b, 0111b, 1111b) [Dirty cheap]
2. Discrete color signal processing – uses two quad-comparator IC to convert R-G-B values to 8 I/O bits (3 bits for Red, 3 bits for Green, 2 bits for Blue) – recognizes (4*4*3) = 48 colors [Dirty cheap] + [RGB decoder]
3. Full monochrome signal processing – use TDA8703 8-bit video A/D converter allowing full range (256 levels) of grays [Velleman]
4. True color signal processing – grabs R, G and B color values from 3 successive fields (really slow, not very clean picture because of pixel jitter) [Velleman] + [RGB decoder]
Glue parts together
Initialize
First step of successful function is the correct device initialization. It’s done in following order:
1. Z8Encore! ports initialization
2. SRAM initial setup
3. NE2000 Ethernet module initialization
4. Ports and signals setup for picture grabbing
Note: Signal SRAM Address reset is driven only by Z8Encore! This is useful for grabbing more than one field and will be used for true colors grabbing.
Digitize
After successful initialization we can start
to collect picture data from CVBS signal. Following information appliesapplyapply
only to PAL (differences to NSTC are shown in Table 1).
In the early stage of this project we wanted to grab and process VGA analog signals directly. This task was nearly impossible to implement. The problem lies in high dot clock frequency generated by VGA cards in standard resolutions modes. Dot frequency range starts at 25MHz (640x480 pixels). Standard (SRAM) memory chips can handle signals up to 15MHz (write cycle lasts 55ns at least). Then we found, that all newer VGA cards send TV-out signal when they detect TV connection (75 ohm terminator is in all TV-in devices).
Processing this signal is relatively easy compared to VGA and there is lot of hardware constructions available which solve this problem (fans of old 16-bit home computers can sure remember popular piece of hardware e.g. frame grabber for Commodore Amiga).
CVBS signal output of TV-out enabled card is the same for all screen resolutions. This is the real advantage in comparison to VGA, because we have to handle the signal with constant horizontal and vertical frequency (while VGA produce variable horizontal and vertical frequencies for each resolution).
PAL CVBS signal consist of 25 picture frames per second. One PAL frame consists of two fields (even and odd). Field consists of half number of frame lines (312.5). There are 21 lines at field start which are not visible on the screen. They are used to make vertical sync pulses and carry teletext information.
Standard PAL line is shown in Diagram 1. Time region a is the line-sync signal which lasts 4.7 uS. Time region b is the back-porch signal (which includes burst – color sub-carrier synchronization information) lasts 5.8 uS.
Diagram 1 – PAL signal line
Main part of digitizer module design is taken from [Techmind.org] MkI Video digitizer. The difference lies in the type of memory which is used to store digitized picture. Original design uses fairly expensive and hard to obtain FIFO memory, with inadequate memory space.
Remote BIOS manager uses cheap and widely available 4Mbit SRAM. With this capacity we don’t need to capture frame in portions. There is enough space to capture whole frame.
Advantage of this changed design (except of FIFO) is that we can completely remove magnitude comparator. Overhead of this changed design lies in address generation circuitry which is necessary for correct SRAM function.
Following description is quotation from (an excellent design of) MkI documentation [Techmind.org]:
“A 40MHz crystal oscillator (IC2) module keeps the circuit ticking and directly drives the clock input of a 12-bit binary counter which acts as a clock frequency divider. The 10MHz tap acts as the clock for the ADC, and is conditionally gated (see below) before feeding the memory write-clock input. It was necessary to "lock" the phase of this 10MHz clock to the incoming video line-sync to prevent the picture wandering sideways by one pixel, and was achieved by resetting the binary counter during line-syncs. If just a 10MHz crystal oscillator were used instead then this phase-locking would not be possible.
A standard sync-separator (IC9) is used to obtain frame and line syncs.
Within each video scan-line we want to ensure that only the useful picture data is stored, and not waste memory with line syncs and porches. Comparing the video signal with the output of the "master clock divider" binary counter, which is reset during line-syncs, reveals that Q9 goes high at about the times we want data-storage to both commence and cease, with Q12 being low at the start and high at the finish.
Diagram 2 - Line timing for data collection
In the diagram, the trace marked "SAMPLE NOW" shows the signal we would like to derive in order to control the storage of data.
At present, a clean "high to sample" signal is obtained quite elegantly using a 'D'-latch clocked by Q9 and data input from NOT Q12.“
End of quotation.
During active SAMPLE_NOW signal every:
· falling edge of the clock writes data prepared by ADCM module into SRAM
· rising edge starts AD conversion and SRAM address increment cycle
At the end of field “STOP” (pin 5 IC8A) signal state is changed from low to high. Z8Encore waits for this signal and when it receives it, grabbing is completed and a complete converted image is in SRAM.
Communicate
We have now successfully grabbed the field and it’s time to send it over the Ethernet using TCP/IP protocol.
Picture is sent in 256 bytes blocks. Each block content information half of line. Because of the character of data we chose UDP datagrams to transmit picture content. PC application receives the data, stores it into a picture array and then paints it onto the screen.
Aux devices
During development it was necessary to know the state of device before it was able to communicate over Ethernet.
Following auxiliary devices comes handy for this purpose:
· RS-232 transmitter/receiver
· 2-seven segment LED indicator with 2-wire communication
